Characterizing Radiation Effects in Integrated Circuits

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CRANE-200261
The U.S. Navy seeks a partner for licensing and collaboration on a method and apparatus for characterizing the effects of radiation on integrated circuits in radiation-rich environments.

Integrated circuits (ICs), or microchips, are a set of electronic circuits on one small piece of semiconductor material that are small, cheaper, and faster than discreet electronics. ICs are used on virtually all electronic equipment since they are small and inexpensive to manufacture.

One type of IC includes NAND Flash, which a memory technology is used in many systems including those that are required to be radiation hardened. Characterization of radiation hardness of NAND Flash bit cells can include the measurement of failed bit cells in various radiation environments.

To better understand and predict the behavior of these ICs, it would be useful to be able to measure changes in bit cell parameters caused by radiation exposure or other stresses below a threshold at which a bit cell failure occurs outside of a factory setting with specific knowledge of manufacturing test modes. Direct measurement of bit cell threshold voltages without various types of such manufacturer information is not possible as manufacturers deliberately obscure these details in the construction of the digital interface to their devices. Careful characterization of parts then requires the measurement of large numbers of bits through the digital interface to obtain statistically significant results.

NSWC Crane has developed and patented an apparatus and methods for using a plurality of interrupted IC operations to detect various conditions or changes of interest to IC elements, such as the memory cells of NAND Flash memories or floating gate transistors. These interrupted IC operations include program/erase stress, total ionizing dose, and heavy ion exposure.

One way to operate the invention includes controlling a plurality of selected IC elements to execute a series of PROGRAM or ERASE operations on all of the plurality of selected elements that are each interrupted or halted before a normal or first time period required for the PROGRAM or ERASE operation has elapsed. An exemplary system records a number of interrupted operations required to cause a state change in each of the plurality of selected IC elements. Embodiments of the invention enable detection of stresses far below the threshold for IC element or bit cell failure.
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Utility Patent
United States
9,620,242
Apr 11, 2017
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