|The U.S. Navy seeks a partner for licensing and collaboration on a method of controlling current or mitigating electromagnetic or radiation interference effects using combined integrated functions of semiconductor structures.
Lateral double-diffused metal-oxide-semiconductor field-effect transistors (LDMOSFETs) subjected to space-like environments or other particle-rich environments are prone to single-event gate rupture (SEGR) and single-event burnout (SEB,) which can adversely affect a device's performance and can even lead to catastrophic system failure. When a charge particle passes through a material, it can create electron-hole pairs along its path which may produce unwanted current flow. A resultant current flow, under certain conditions, can lead to SEB or SEGR. SEB can occur if particle-induced current flow turns on a parasitic bipolar transistor (parasitic bipolar is inherent to design of device) and can lead to thermal runaway (e.g., device fails catastrophically). SEGR can occur if particle-induced current flow disrupts the depletion field in the epitaxial layer under the gate coupling a portion of drain potential across gate dielectric sufficient to damage gate dielectric.
Attempts have been made to enhance electrical and radiation performance of LDMOSFETs including improvements in design, layout, and fabrication. Significant efforts have been devoted to resolve issues with SEB, SEGR, and total ionizing dose.
NSWC Crane has designed and patented apparatuses and methods for modulating current and voltage response using multiple different semiconductor structures which create different semi-conductive regions (SCRs) operable to influence an electrical signal path in different environments or modes. The invention can be implemented using different types of semiconductors that are normally susceptible to various types of radiation or electromagnetic interference environments, such as LDMOSFET and junction field effect transistor (JFET).
The invention is used for modulating current and voltage response using multiple SCRs produced from different integrated semiconductor structures. It resolves the current issues with existing LDMOSFETs by integrating a combination of LDMOSFET and JFET functions operable to modulate current and voltage response or to mitigate electromagnetic or radiation interferences by altering current flow through the semi-conductive channel regions, through a JFET's SCR, or both.
This invention fulfills a long felt need in the space, aviation, and radiation fields by providing a way to use semiconductors that are normally susceptible to various types of radiation or electromagnetic interference effects.
This patent is closely related to the "Dual-Gate Vertical Double Diffused Metal Oxide Field Effect Transistor," which can be found in CRANE-200100.
Aug 23, 2016
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