Electron-Beam Lithography

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2015-PAN-67012
Optical lithography, the process of transferring geometric shapes on a mask to a wafer, has been the critical enabling step for determining nanotechnology device performances such as the transistor density and speed in microprocessors. Tools currently used to transfer fixed geometric patterns on a mask to wafers in the production of semiconductor chips cost more than $50 million each, and the mask cost far outweighs the cost of tools. Designed to match chip capabilities with Moore's Law, next generation tools will be far too costly for both industry and scientists. Researchers have focused on developing massively parallel electron beam lithography and achieved 2 to 3 orders of magnitude throughput enhancement using a variety of methods, but the roadblock has been the lack of an enabling technology to generate millions of high-quality electron beamlets with satisfactory brightness and uniformity. In addition, the current process cannot meet long-term demand to produce faster chips with more functions.

Researchers at Purdue University have a developed a new technology that utilizes a novel device to focus optical energy at nanoscale and locally excite electrons to form massively parallel electron beams, which can be used to perform maskless lithography in mass quantities. Maskless lithography can write finer features by rastering a nanometer-sized beam or probe to generate surface patterns and has been applied to niche applications such as device prototyping and low-volume production. Among all maskless methods, electron beam lithography can provide high resolution beyond the 10-year industry roadmap. Electron-beam lithography also has the highest scanning speed. This technology could be used for top-down nanomanufacturing methods to carry on the trends of ever decreasing critical dimensions and ever increasing design complexities of semiconductor chips at a relatively low cost.

Advantages:
-Focuses optical energy at nanoscale
-Perform maskless lithography in mass quantities
-Highest scanning speed
-Semiconductor chip design at a lower cost

Potential Applications:
-Semiconductor industry
-Further development of nanotechnology
-Photonics and biological systems
Jun 7, 2016
Utility Patent
United States
10,074,509
Sep 11, 2018

Sep 11, 2018
CON-Patent
United States
(None)
(None)

Jun 7, 2015
Provisional-Patent
United States
(None)
(None)
Purdue Office of Technology Commercialization
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West Lafayette, IN 47906

Phone: (765) 588-3475
Fax: (765) 463-3486
Email: otcip@prf.org