Bit Serial Digital Winner Take All Circuit

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2014-ROY-66763
Winner Take All (WTA) is a computational principle applied in computational models of neural networks. WTA is used to identify the maximum among a large number of m-bit input values. It is a critical part of pattern matching applications to find the maximum among the outputs of a distance-evaluation matrix. Current WTA circuits are based on a binary tree structure. In these circuits, the number of stages and nodes in the binary WTA tree increases when the number of inputs to the WTA increases, leading to a larger delay and area.

Researchers at Purdue University have developed a new Winner Take All circuit structure which is a fully parallel bit-serial digital WTA. It can identify the largest among a large number of m-bit data in m-cycles. The time taken by the circuit to identify the maximum among the inputs is independent of the number of inputs, which leads to fast and low power WTA operation.

Advantages:
-Faster operation time that is independent of the number of inputs
-Low power requirement

Potential Applications:
-WTA circuit
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