Bit Serial Digital Winner Take All Circuit

Back to all technologies
Download as PDF
Winner Take All (WTA) is a computational principle applied in computational models of neural networks. WTA is used to identify the maximum among a large number of m-bit input values. It is a critical part of pattern matching applications to find the maximum among the outputs of a distance-evaluation matrix. Current WTA circuits are based on a binary tree structure. In these circuits, the number of stages and nodes in the binary WTA tree increases when the number of inputs to the WTA increases, leading to a larger delay and area.

Researchers at Purdue University have developed a new Winner Take All circuit structure which is a fully parallel bit-serial digital WTA. It can identify the largest among a large number of m-bit data in m-cycles. The time taken by the circuit to identify the maximum among the inputs is independent of the number of inputs, which leads to fast and low power WTA operation.

-Faster operation time that is independent of the number of inputs
-Low power requirement

Potential Applications:
-WTA circuit
Nov 2, 2017
United States
Nov 12, 2019

Oct 26, 2016
United States
Nov 7, 2017

May 27, 2014
Utility Patent
United States
Nov 8, 2016
Purdue Office of Technology Commercialization
The Convergence Center
101 Foundry Drive, Suite 2500
West Lafayette, IN 47906

Phone: (765) 588-3475
Fax: (765) 463-3486