Optimized Vertical Power DMOSFETs in Silicon Carbide

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An important feature in a vertical double-diffused metal oxide semiconductor field effect transistor (DMOSFET) is its ability to drive a load with minimal parasitic resistance at a given breakdown voltage. When the load is switched off, the maximum breakdown voltage is crucial. A DMOSFET produced using silicon carbide process material will have higher breakdown voltage than a DMOSFET produced in other process materials but often will have a higher parasitic resistance.

Researchers at Purdue University have developed a structure and method of fabrication of a vertical DMOSFET in silicon carbide that achieves minimum on-state resistance and maximum breakdown voltage.

Advantages:
-Increases breakdown voltage without increasing internal resistivity
-Provides consistent internal resistance at a greater operating temperature range

Potential Applications:
-Materials
-Manufacturing
Jan 23, 2006
Utility Patent
United States
7,498,633
Mar 3, 2009

Jan 21, 2005
Provisional-Patent
United States
(None)
(None)
Purdue Office of Technology Commercialization
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